View APW7290_8680323.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 a n p e c r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o i m p r o v e r e l i a b i l i t y o r m a n u f a c t u r a b i l i t y w i t h o u t n o t i c e , a n d a d v i s e c u s t o m e r s t o o b t a i n t h e l a t e s t v e r s i o n o f r e l e v a n t i n f o r m a t i o n t o v e r i f y b e f o r e p l a c i n g o r d e r s . 1 . 5 m h z , 1 a s y n c h r o n o u s b u c k r e g u l a t o r a p w 7 2 9 0 f e a t u r e s g e n e r a l d e s c r i p t i o n 1a output current support 4 aa alkaline, nicd or nimh batteries wide 3.5v~7.2v input voltage fixed 1.5mhz switching frequency low dropout operating at 100% duty cycle low 25 m a quiescent current integrate synchronous rectifier 0 . 6 v l o w r e f e r e n c e v o l t a g e <0.5 m a input current during shutdown current-mode operation with internal compensation - stable with ceramic output capacitors - fast line transient response short-circuit protection over-temperature protection with hysteresis available in tdfn2x2-8 package lead free and green devices available (rohs compliant) the APW7290 is a high efficiency monolithic synchro- nous buck regulator. APW7290 operates with a constant 1.5mhz switching frequency and using the inductor cur- rent as a controlled quantity in the current mode architecture. the 3.5v to 7.2v input voltage range makes the APW7290 ideally suited for single li-ion battery pow- ered applications. 100% duty cycle provides low dropout operation, extending battery life in portable electrical devices. the internally fixed 1.5mhz operating frequency allows the use of small surface mount inductors and capacitors. the synchronous switches included inside increase the efficiency and eliminate the need for an ex- ternal schottky diode. the APW7290 is available in tdfn2x2-8 package. a p p l i c a t i o n s e-book toy portable instrument p i n c o n f i g u r a t i o n tdfn 2 x 2 - 8 ( top view ) 1 6 5 4 3 2 8 7 lbo vout sw fb vin lbi run gnd s i m p l i f i e d a p p l i c a t i o n c i r c u i t vin gnd lbi 1 fb 5 apw 7290 sw 3 v in v out l 1 r 2 2 r 1 c 1 c 2 on off run 4 vout r 3 low battery output lbo r 4 r 5 6 7 8
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 2 a p w 7 2 9 0 o r d e r i n g a n d m a r k i n g i n f o r m a t i o n n o t e : a n p e c l e a d - f r e e p r o d u c t s c o n t a i n m o l d i n g c o m p o u n d s / d i e a t t a c h m a t e r i a l s a n d 1 0 0 % m a t t e t i n p l a t e t e r m i n a t i o n f i n i s h ; w h i c h a r e f u l l y c o m p l i a n t w i t h r o h s . a n p e c l e a d - f r e e p r o d u c t s m e e t o r e x c e e d t h e l e a d - f r e e r e q u i r e m e n t s o f i p c / j e d e c j - s t d - 0 2 0 d f o r m s l c l a s s i f i c a t i o n a t l e a d - f r e e p e a k r e f l o w t e m p e r a t u r e . a n p e c d e f i n e s ? g r e e n ? t o m e a n l e a d - f r e e ( r o h s c o m p l i a n t ) a n d h a l o g e n f r e e ( b r o r c l d o e s n o t e x c e e d 9 0 0 p p m b y w e i g h t i n h o m o g e n e o u s m a t e r i a l a n d t o t a l o f b r a n d c l d o e s n o t e x c e e d 1 5 0 0 p p m b y w e i g h t ) . apw 7290 handling code temperature range package code assembly material apw 7290 qb : x - date code package code qb : tdfn 2 x 2 - 8 operating ambient temperature range i : - 40 to 85 o c handling code tr : tape & reel assembly material g : halogen and lead free device l : lead free device w 90 x a b s o l u t e m a x i m u m r a t i n g s ( n o t e 1 ) symbol parameter rating unit v in input bias supply voltage (vin to gnd) - 0.3 ~ 8 v v sw sw to gnd voltage - 0.3 ~ v in +0.3 v lbo and run to gnd voltage - 0.3 ~ 8 v v i/o lbi and fb to gnd voltage - 0.3 ~ 3.3 v p d power dissipation internally limited w ma ximum junction temperature 150 o c t stg storage temperature - 65 ~ 150 o c t sdr maximum lead soldering temperature (10 seconds ) 26 0 o c n o t e 1 : s t r e s s e s b e y o n d t h o s e l i s t e d u n d e r " a b s o l u t e m a x i m u m r a t i n g s " m a y c a u s e p e r m a n e n t d a m a g e t o t h e d e v i c e . t h e s e a r e s t r e s s r a t i n g s o n l y a n d f u n c t i o n a l o p e r a t i o n o f t h e d e v i c e a t t h e s e o r a n y o t h e r c o n d i t i o n s b e y o n d t h o s e i n d i c a t e d u n d e r " r e c o m - m e n d e d o p e r a t i n g c o n d i t i o n s " i s n o t i m p l i e d . e x p o s u r e t o a b s o l u t e m a x i m u m r a t i n g c o n d i t i o n s f o r e x t e n d e d p e r i o d s m a y a f f e c t d e v i c e r e l i a b i l i t y . t h e r m a l c h a r a c t e r i s t i c s symbol parameter typical value unit q ja junction - to - ambient resistance in f ree a ir (note 2) tdfn2x2 - 8 165 o c/w q j c junction - to - case resistance tdfn2x2 - 8 20 o c/w note 2: q ja is measured with the component mounted on a high effective thermal conductivity test board in free air.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 3 a p w 7 2 9 0 symbol parameter range unit v in input bias supply voltage ( vin to gnd) 3.5 ~ 7.2 v v out converter output voltage adj : 0.6 ~ 6 fixed : 1.8 v i out converter output current 0 ~ 1 a l1 converter output inductor 1.0 ~ 10 m h c in converter input capacitor 4 .7 ~ m f c out converter output capacitor 4.7 ~ m f t a ambient temperature - 40 ~ 85 o c t j junction temperature - 4 0 ~ 125 o c r e c o m m e n d e d o p e r a t i n g c o n d i t i o n s ( n o t e 3 ) n o t e 3 : r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t e l e c t r i c a l c h a r a c t e r i s t i c s apw 7290 symbol parameter test conditions min typ max unit supply voltage and current v in input voltage range 3.5 - 7.2 v i dd quiescent current v fb = 0.66v - 25 40 m a i sd shutdown input current run = gnd - - 0.5 m a power - on - reset (por) and lockou t voltage thresholds uvlo threshold 3.0 3.2 3.4 v uvlo hysteresis - 200 - mv reference voltage v ref regulated voltage v in =3.5v~7.2v, t a = - 40~85 o c, 0.588 0.6 0.612 v output voltage accuracy 0a < i out < 1a - 2.5 - +2.5 % i fb fb input current - 50 - 50 na vout output voltage fb=gnd, no load 1.764 1.8 1.836 v internal power mosfets f sw switching frequency v fb = 0.6v 1.2 1.5 1.8 mhz fold back frequency v fb = 0.1v - 210 - khz fold back voltage on fb v fb falling - 0.2 - v fold back hysteresi s v fb rising - 120 - mv r p - fet high side p - fet switch on resistance i sw =200ma - 0.28 - w r n - fet low side n - fet switch on resistance i sw =200ma - 0.25 - w minimum on - time - - 100 ns maximum duty cycle - - 100 % u n l e s s o t h e r w i s e s p e c i f i e d , t h e s e s p e c i f i c a t i o n s a p p l y o v e r v i n = 5 v a n d t a = - 4 0 ~ 8 5 o c . t y p i c a l v a l u e s a r e a t t a = 2 5 o c .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 4 a p w 7 2 9 0 e l e c t r i c a l c h a r a c t e r i s t i c s apw 7290 symbol parameter test conditions min typ max unit protection i lim maximum inductor current limit i p - fet , 3.5 v ?? v i n ?? 7.2 v 1.4 1.6 - a t otp over - temperature protection t j rising - 150 - over - temperature protection hysteresis t j falli ng - 3 0 - c start - up and shutdown t ss soft - start duration (note 4) - 0.7 - ms run input high threshold v in = 3.5v~7.2v - - 1 v run input low threshold v in = 3.5v~7.2v 0.4 - - v run leakage current v run = 5v, v in = 5v - 1 - 1 m a v lbi lbi threshold 0.588 0 .6 0.612 v i lbi lbi input current v lbi =0.8v - 1 50 na lbi input hysteresis - 10 - mv v lbo lbo logic low v lbi =3.3v, i sink =1ma - 0.2 0.4 v i lbo lbo off leakage current v lbo =5.5v, v lbi =0v - 0.07 1 m a u n l e s s o t h e r w i s e s p e c i f i e d , t h e s e s p e c i f i c a t i o n s a p p l y o v e r v i n = 5 v a n d t a = - 4 0 ~ 8 5 o c . t y p i c a l v a l u e s a r e a t t a = 2 5 o c . n o t e 4 : g u a r a n t e e b y d e s i g n , n o t p r o d u c t i o n t e s t .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 5 a p w 7 2 9 0 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s temperature vs . feedback voltage 0 . 58 0 . 585 0 . 59 0 . 595 0 . 6 0 . 605 0 . 61 0 . 615 0 . 62 - 60 - 40 - 20 0 20 40 60 80 100 120 140 temperature ( o c ) f e e d b a c k v o l t a g e ( v ) 1 . 2 1 . 3 1 . 4 1 . 5 1 . 6 1 . 7 1 . 8 - 40 - 20 0 20 40 60 80 100 120 140 temperature ( o c ) f r e q u e n c y ( m h z ) temperature vs . frequency io ( ma ) 0 100 200 300 400 500 600 700 800 900 1000 50 . 0 65 . 0 70 . 0 75 . 0 80 . 0 85 . 0 90 . 0 95 . 0 100 . 0 e f f i c i e n c y ( % ) io vs . efficiency vo = 3 v , l = 2 . 2 uh , cin = 10 u f , co = 10 uf vin = 4 v vin = 5 . 5 v vin = 7 v 60 . 0 55 . 0 0 5 10 15 20 25 30 35 40 3 3 . 5 4 4 . 5 5 5 . 5 6 6 . 5 7 vin input voltage ( v ) q u i e s c e n t c u r r e n t ( u a ) vin input voltage vs . quiescent current 0 0 . 2 0 . 4 0 . 6 0 . 8 1 3 3 . 5 4 4 . 5 5 5 . 5 6 6 . 5 7 vin input voltage ( v ) s h u t d o w n c u r r e n t ( u a ) vin input voltage vs . shutdown current
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 6 a p w 7 2 9 0 o p e r a t i n g w a v e f o r m s ch 1 : v in - 2 v / div ch 2 : v out - 1 v / div ch 3 : sw - 5 v / div ch 4 : i l - 500 ma / div time : 100 us / div power on en ch 1 ch 2 ch 3 ch 4 power off en ch 1 : v in - 2 v / div ch 2 : v out - 1 v / div ch 3 : sw - 5 v / div ch 4 : i l - 500 ma / div time : 1 s / div ch 1 ch 2 ch 3 ch 4 ch 1 : v in - 2 v / div ch 2 : v out - 1 v / div ch 3 : sw - 5 v / div ch 4 : i l - 1 a / div time : 500 ns / div normal operation ch 1 ch 2 ch 3 ch 4
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 7 a p w 7 2 9 0 p i n d e s c r i p t i o n pin no. name f unction 1 gnd power and signal ground. 2 vin device and converter supply pin . must be closely decoupled to gnd with a 4.7 m f or greater ceramic capacitor. 3 run enable control input. forcing this pin above 1.0v enables the device. forcing this pin below 0. 4 v shuts it down. in shutdown, all functions are disabled to decrease the supply current below 0.5 a. do not leave run pin floating. 4 lbi low - battery comparator input. internally set to trip at 0.6v. 5 fb feedback inpu t pin and output voltage select pin . the b uck regulator senses feedback voltage via fb and regulates the fb voltage at 0 .6 v. connecting fb with a resistor - divider from the output sets the output voltage of the b uck converter. if fb connects to gnd, vout is fixed 1.8v. 6 v out output voltage. output voltage feedback input if fb pin is connected to vout or gnd. 7 sw switch node connected to inductor. this pin connects to the drains of the internal main and synchronous power mosfets switches. 8 lbo open - drain low battery com parator output. connect lbo to out through a 100k w resistor. lbo is low as v lbi < 0.6v. open - drain device is turned o ff during shutdown. b l o c k d i a g r a m oscillator logic control sw over - temperature protection v ref 0 . 6 v eamp comp i cmp soft - start error amplifier zero - crossing comparator current limit slope compensation vin current sense amplifier shutdown control ? fb run gnd gate driver vout vout selector 0 . 6 v lbi lbo
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 8 a p w 7 2 9 0 t y p i c a l a p p l i c a t i o n c i r c u i t vin gnd lbi 1 fb 5 apw 7290 sw 3 v in 3 . 6 ~ 7 . 2 v v out 3 . 3 v / 1 a l 1 2 . 2 h r 2 10 k 2 r 1 45 k c 1 c 2 10 f / 6 . 3 v / x 5 r ( mlcc ) r 1 900 k w is recommended r 2 2 00 k w is recommended on off run 4 vout 100 k low battery output lbo 10 k 10 k 6 7 8 10 f / 6 . 3 v / x 5 r ( mlcc ) toy application e-book application vin gnd lbi 1 fb 5 apw 7290 sw 3 v in 3 . 6 ~ 7 . 2 v v out 1 . 8 v / 300 m a l 1 2 . 2 h 2 c 2 10 f / 6 . 3 v / x 5 r ( mlcc ) on off run 4 vout 100 k low battery output lbo 10 k 10 k 6 7 8 10 f / 6 . 3 v / x 5 r ( mlcc ) c 1 power sequence: a. vin rise up -> run rise up b. run rise up -> vin rise up
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 9 a p w 7 2 9 0 f u n c t i o n d e s c r i p t i o n main control loop the APW7290 is a constant frequency, synchronous rec- tifier and current-mode switching regulator. in normal operation, the internal p-channel power mosfet is turned on each cycle. the peak inductor current at which icmp turn off the p-fet is controlled by the voltage on the comp node, which is the output of the error amplifier (eamp). an external resistive divider connected between vout and ground allows the eamp to receive an output feedback voltage vfb at fb pin. when the load current increases, it causes a slightly decrease in vfb relative to the 0.6v reference, which in turn causes the comp volt- age to increase until the average inductor current matches the new load current. under-voltage lockout an under-voltage lockout function prevents the device from operating if the input voltage on vin is lower than approxi- mately 3v (typ.). the device automatically enters the shut- down mode if the voltage on vin drops below approxi- mately 3v. this under-voltage lockout function is imple- mented in order to prevent the malfunctioning of the converter. soft-start the APW7290 has a built-in soft-start to control the out- put voltage rise during start-up. during soft-start, an in- ternal ramp voltage, connected to the one of the positive inputs of the error amplifier, raises up to replace the ref- erence voltage (0.6v typical) until the ramp voltage reaches the reference voltage. then the voltage on fb regulated at reference voltage. enable/shutdown driving run to ground places the APW7290 in shutdown mode. when in shutdown, the internal power mosfets turn off, all internal circuitry shuts down and the quies- cent supply current reduces to 0.5 m a maximum. pulse frequency modulation mode (pfm) the APW7290 is a fixed frequency, peak current mode pwm step-down converter. at light loads, the APW7290 will automatically enter in pulse frequency mode opera- tion to reduce the dominant switching losses. in pfm operation, the inductor current may reach zero or reverse on each pulse. a zero current comparator turn off the n- fet, forcing dcm operation at light load. these controls get very low quiescent current, help to maintain high effi- ciency over the complete load range. slope compensation and inductor peak current slope compensation provides stability in constant fre- quency architectures by preventing sub-harmonic oscil- lations at high duty cycles. it is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. normally, the re- sult is in a reduction of maximum inductor peak current for duty cycles > 40%. however, the APW7290 uses a special scheme that counteracts this compensating ramp, which allows the maximum inductor peak current to remain unaffected throughout all duty cycles. adaptive shoot-through protection the gate driver incorporates adaptive shoot-through pro- tection to high-side and low-side mosfets from con- ducting simultaneously and shorting the input supply. this is accomplished by ensuring the falling gate has turned off one mosfet before the other is allowed to rise. during turn-off the low-side mosfet, the internal lgate voltage is monitored until it below 1.5v threshold, at which time the ugate is released to rise after a constant delay. during turn-off the high-side mosfet, the ugate volt- age is also monitored until it above 1.5v threshold, at which time the lgate is released to rise after a constant delay. dropout operation as the input supply voltage decreases to a value ap- proaching the output voltage, the duty cycle increases toward the maximum on time. further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. the output voltage will then be determined by the input volt- age minus the voltage drop across the p-fet and the inductor.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 0 a p w 7 2 9 0 f u n c t i o n d e s c r i p t i o n ( c o n t . ) dropout operation (cont.) an important detail to remember is that on resistance of p-fet switch will increase at low input supply voltage. therefore, the user should calculate the power dissipa- tion when the APW7290 is used at 100% duty cycle with low input voltage. over-temperature protection (otp) the over-temperature circuit limits the junction tempera- ture of the APW7290. when the junction temperature ex- ceeds 150 o c, a thermal sensor turns off the both power mosfets, allowing the devices to cool. the thermal sen- sor allows the converters to start a soft-start process and regulate the output voltage again after the junction tem- perature cools by 30 o c. the otp designed with a 30 o c hysteresis lowers the average junction temperature (t j ) during continuous thermal overload conditions, increas- ing the life time of the device. short-circuit protection when the output is shorted to ground, the frequency of the oscillator is reduced to about 210 khz, 1/7 of the nomi- nal frequency. this frequency fold back ensures that the inductor current has more time to decay, thereby prevent- ing runaway. the oscillator?s frequency will progressively increase to 1.5mhz when v fb or v out rises above 0v. low battery detection the low battery detection is used to monitor the battery voltage and to generate a signal. this function includes two pins, lbi is the inverting input of the comparator and lbo is an open drain output (see block diagram). when the lbi voltage drops below the threshold voltage 0.6v, the open drain device will turn on and lbo becomes low. the low battery threshold voltage can be programmed with a resistive divider from battery to lbi pin to the round. since the lbo is an open drain output, it usually requires an external pull-up resistor.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 1 a p w 7 2 9 0 a p p l i c a t i o n i n f o r m a t i o n input capacitor selection b e c a u s e b u c k c o n v e r t e r s h a v e a p u l s a t i n g i n p u t c u r r e n t , a l o w e s r i n p u t c a p a c i t o r i s r e q u i r e d . t h i s r e s u l t s i n t h e b e s t i n p u t v o l t a g e f i l t e r i n g , m i n i m i z i n g t h e i n t e r f e r e n c e w i t h o t h e r c i r c u i t s c a u s e d b y h i g h i n p u t v o l t a g e s p i k e s . a l s o , t h e i n p u t c a p a c i t o r m u s t b e s u f f i c i e n t l y l a r g e t o s t a - b i l i z e t h e i n p u t v o l t a g e d u r i n g h e a v y l o a d t r a n s i e n t s . f o r g o o d i n p u t v o l t a g e f i l t e r i n g , u s u a l l y a 4 . 7 m f i n p u t c a p a c i - t o r i s s u f f i c i e n t . i t c a n b e i n c r e a s e d w i t h o u t a n y l i m i t f o r b e t t e r i n p u t - v o l t a g e f i l t e r i n g . c e r a m i c c a p a c i t o r s s h o w b e t t e r p e r f o r m a n c e b e c a u s e o f t h e l o w e s r v a l u e , a n d t h e y a r e l e s s s e n s i t i v e a g a i n s t v o l t a g e t r a n s i e n t s a n d s p i k e s c o m p a r e d t o t a n t a l u m c a p a c i t o r s . p l a c e t h e i n p u t c a p a c i t o r a s c l o s e a s p o s s i b l e t o t h e i n p u t a n d g n d p i n o f t h e d e v i c e f o r b e t t e r p e r f o r m a n c e . inductor selection for high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. especially at high-switching frequencies, the core material has a higher impact on efficiency. when using small chip inductors, the efficiency is reduced mainly due to higher inductor core losses. this needs to be considered when selecting the appropriate inductor. the inductor value de- termines the inductor ripple current. the larger the induc- tor value, the smaller the inductor ripple current and the lower the conduction losses of the converter. conversely, larger inductor values cause a slower load transient response. a reasonable starting point for setting ripple current, d i l, is 40% of maximum output current. the rec- ommended inductor value can be calculated as below: l sw in out out i f v v 1 v l d ? ? ? ? ? - 3 i l(max) = i out(max) + 1/2 x d i l to avoid the saturation of the inductor, the inductor should be rated at least for the maximum output current of the converter plus the inductor ripple current. output voltage setting in the adjustable version, the output voltage is set by a resistive divider. the external resistive divider is con- nected to the output, allowing remote voltage sensing as ? ? ? ? ? + = ? ? ? ? ? + = 2 r 1 r 1 6 . 0 2 r 1 r 1 v v ref out shown in ?typical application circuits?. a suggestion of maximum value of r2 is 200k w to keep the minimum current that provides enough noise rejection ability through the resistor divider. the output voltage can be calculated as below: output capacitor selection the current-mode control scheme of the APW7290 al- lows the use of tiny ceramic capacitors. the higher ca- pacitor value provides the good load transients response. ceramic capacitors with low esr values have the lowest output voltage ripple and are recommended. if required, tantalum capacitors may be used as well. the output ripple is the sum of the voltages across the esr and the ideal output capacitor. ? ? ? ? ? + ? ? ? ? ? - @ d out sw sw in out out out c f 8 1 esr l f v v 1 v v when choosing the input and output ceramic capacitors, choose the x5r or x7r dielectric formulations. these dielectrics have the best temperature and voltage char- acteristics of all the ceramics for a given value and size. v in v ou t i l n-fet sw i ou t c in c ou t i in esr p-fet i p-fet r 2 200 k w apw 7290 fb gnd v out r 1 1 m w
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 2 a p w 7 2 9 0 a p p l i c a t i o n i n f o r m a t i o n ( c o n t . ) thermal consideration in most applications, the APW7290 does not dissipate much heat due to its high efficiency. but, in applications where the APW7290 is running at high ambient tempera- ture with low supply voltage and high duty cycles, the heat dissipated may exceed the maximum junction tempera- ture of the part. if the junction temperature reaches ap- proximately 150c, both power switches will be turned off and the sw node will become high impedance. to avoid the APW7290 from exceeding the maximum junc- tion temperature, the user will need to do some thermal analysis. the goal of the thermal analysis is to deter- mine whether the power dissipated exceeds the maxi- mum junction temperature of the part. the power dissi- pated by the part is approximated: p d @ i out 2 x (r p-fet x d+r n-fet x (1-d)) the temperature rise is given by: t r = (p d )( q ja ) where p d is the power dissipated by the regulator, d is duty cycle of main switch d = v out /v in the q ja is the thermal resistance from the junction of the die to the ambient temperature. the junction temperature, t j , is given by: t j = t a + t r where t a is the ambient temperature. output capacitor selection (cont.) i lim i l i peak i out i p-fet d i l the maximum power dissipation on the device can be shown as follow figure: layout consideration for all switching power supplies, the layout is an impor- tant step in the design; especially at high peak currents and switching frequencies. if the layout is not carefully done, the regulator might show noise problems and duty cycle jitter. 1. the input capacitor should be placed close to the vin and gnd. connecting the capacitor and vin/gnd with short and wide trace without any via holes for good input voltage filtering. the distance between vin/gnd to capacitor less than 2mm respectively is recommended. 2. to minimize copper trace connections that can inject noise into the system, the inductor should be placed as close as possible to the sw pin to minimize the noise coupling into other circuits. 3. the output capacitor should be place closed to con- verter vout and gnd. 4. since the feedback pin and network is a high imped- ance circuit the feedback network should be routed away from the inductor. the feedback pin and feed- back network should be shielded with a ground plane or trace to minimize noise coupling into this circuit. 5. a star ground connection or ground plane minimizes ground shifts and noise is recommended. junction temperature ( o c ) m a x i m u m p o w e r d i s s p a t i o n ( w ) - 50 - 25 0 25 50 75 100 125 150 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 3 a p w 7 2 9 0 recommended minimum footprint a p p l i c a t i o n i n f o r m a t i o n ( c o n t . ) 0 . 012 0 . 032 0 . 022 0 . 02 the via diameter = 0 . 012 hole size = 0 . 008 layout 0 . 0 5 1 unit : inch 0 . 009 0 . 3 0 . 8 0 . 54 0 . 5 the via diameter = 0 . 012 hole size = 0 . 008 layout 1 . 3 unit : mm 0 . 225
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 4 a p w 7 2 9 0 p a c k a g e i n f o r m a t i o n t d f n 2 x 2 - 8 s y m b o l min. max. 0.80 0.00 0.18 0.30 1.00 1.60 0.05 0.60 a a1 b d d2 e e2 e l millimeters a3 0.20 ref tdfn2x2-8 0.30 0.45 1.00 0.008 ref min. max. inches 0.031 0.000 0.007 0.012 0.039 0.063 0.024 0.012 0.018 0.70 0.039 0.028 0.002 0.50 bsc 0.020 bsc 1.90 2.10 0.075 0.083 1.90 2.10 0.075 0.083 note : 1. followed from jedec mo-229 wccd-3. e l e 2 pin 1 cornar d2 e d a b a1 a3
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 5 a p w 7 2 9 0 application a h t1 c d d w e1 f 178.0 ? 2.00 50 min. 8.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 8.0 ? 0.20 1.75 ? 0.10 3.50 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tdfn2x2 - 8 4.0 ? 0.10 4.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0.4 3.35 min 3.35 mi n 1.30 ? 0.20 (mm) d e v i c e s p e r u n i t c a r r i e r t a p e & r e e l d i m e n s i o n s package type unit quantity tdfn2x2 - 8 tape & reel 3000 a e 1 a b w f t p0 od0 b a0 p2 k0 b 0 section b-b section a-a od1 p1 h t1 a d
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 6 a p w 7 2 9 0 t a p i n g d i r e c t i o n i n f o r m a t i o n t d f n 2 x 2 - 8 user direction of feed c l a s s i f i c a t i o n p r o f i l e
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 7 a p w 7 2 9 0 c l a s s i f i c a t i o n r e f l o w p r o f i l e s profile feature sn - pb eutectic assembly pb - free assembly preheat & soak temperature min (t smin ) temperature max (t smax ) time (t smin to t smax ) ( t s ) 100 c 150 c 60 - 120 seconds 150 c 200 c 60 - 1 2 0 seconds average ramp - up rate (t smax to t p ) 3 c/second ma x. 3 c/second max. liquidous temperature ( t l ) time at l iquidous (t l ) 183 c 60 - 150 seconds 217 c 60 - 150 seconds peak package body temperature (t p ) * see classification temp in table 1 see classification temp in table 2 time (t p ) ** within 5 c of the spe cified c lassification t emperature ( t c ) 2 0 ** seconds 3 0 ** seconds average r amp - down rate (t p to t smax ) 6 c/second max. 6 c/second max. time 25 c to p eak t emperature 6 minutes max. 8 minutes max. * tolerance for peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. ** tolerance for time at peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. table 2. pb - free process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 350 - 2000 volume mm 3 >2000 <1.6 mm 260 c 260 c 260 c 1.6 mm ? 2.5 mm 260 c 250 c 245 c 3 2.5 mm 250 c 245 c 245 c table 1. snpb eutectic process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 3 350 <2.5 mm 235 c 22 0 c 3 2.5 mm 220 c 220 c test item method description solderability jesd - 22, b102 5 sec, 245 c holt jesd - 22, a108 1000 hrs, bias @ tj=125 c pct jesd - 22, a102 168 hrs, 100 % rh, 2atm , 121 c tct jesd - 22, a104 500 cycles, - 65 c~150 c hbm mil - std - 883 - 3015.7 vhbm ? 2kv mm jesd - 22, a1 15 vmm ? 200v latch - up jesd 78 10ms, 1 tr ? 100ma r e l i a b i l i t y t e s t p r o g r a m
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - j u n . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 8 a p w 7 2 9 0 c u s t o m e r s e r v i c e a n p e c e l e c t r o n i c s c o r p . head office : no.6, dusing 1st road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 t a i p e i b r a n c h : 2 f , n o . 1 1 , l a n e 2 1 8 , s e c 2 j h o n g s i n g r d . , s i n d i a n c i t y , t a i p e i c o u n t y 2 3 1 4 6 , t a i w a n t e l : 8 8 6 - 2 - 2 9 1 0 - 3 8 3 8 f a x : 8 8 6 - 2 - 2 9 1 7 - 3 8 3 8

▲Up To Search▲

Price & Availability of APW7290

	To Download APW7290 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .